Artem Kostenko

Highly skilled professional with expertise in EDA and simulation tools such as KiCad, OrCAD PSpice, Ansys HFSS, and MATLAB. Proficient in programming and scripting languages including C, Python, and VHDL. Demonstrated ability to operate test and measurement equipment like oscilloscopes, spectrum analysers, multimeters, and signal generators for circuit debugging and validation. Experienced in soldering (through-hole and SMD), PCB assembly, testing, and working with technical documentation and circuit schematics. Adept at using Microsoft Office tools for documentation and presentation purposes.

Tools: KiCad, PSpice, TI Webench, GitHub
Role: Full-cycle Hardware Developer
Link: github.com/Goosis/DC-DC-ldo-analog-supply

• Designed and implemented a two-stage analog power supply: 6–10 V input → 4 V @ 3.5 A (buck) → 2.6 V @ 1.7 A (LDO).
• Developed a 4-layer PCB layout in KiCad with proper grounding, current-handling and thermal design.
• Simulated circuit behavior in PSpice to verify startup, regulation, and soft-start response.
• Created full documentation including schematic, layout, BOM, Gerber files, and failure analysis.
• Identified and resolved hardware issues (BIAS misconfiguration, EN logic, pad design flaws).

Tools: C, I2C/SPI, Embedded C libraries
Role: Embedded Software Developer (Team Project)
Link: github.com/ErikStra/DE2_Project_Climate-Chamber-System

• Collaborated as part of a team to build a system that monitors and regulates key environmental parameters for tropical plants (temperature, humidity, light levels, soil moisture).
• Developed sensor interface code and control logic in modular C.
• Contributed to data acquisition, visualization, and user interface functionality.
• Focused on system integration and stable operation in real-time conditions.

Tools: VHDL, Quartus, ModelSim
Role: RTL Logic Developer
Link: github.com/Goosis/VHDL-Implementation-of-Basic-Ciphers

• Designed and implemented simple cryptographic encoder/decoder modules using VHDL.
• Built modular architecture using structural and behavioral VHDL techniques.
• Verified timing and logic correctness via ModelSim testbenches and waveform inspection.
• Demonstrated functionality through simulation and waveform-based debugging.